1. Field of the Invention
The present invention relates to a memory control system with a memory unit comprising a plurality of memory blocks which are individually accessible.
2. Description of the Related Art
Conventionally, a data processing apparatus is realized which has a CPU 10 (first processing means) and a DMA controller 20 (second processing means) as shown in FIG. 9 so that data is directly transferred between a
magnetic disk 40 and a RAM 30b under the control of the DMA controller 20, without involving the CPU 10, and during the data transfer, the CPU 10 executes another processing, e.g., processing of data in a RAM 30a, thereby increasing the data processing speed.
In other words, according to this data processing apparatus, the CPU 10 needs only to specify, to the DMA controller 20, data to be transferred, and read/write access to the RAM 30b or the like, and execution of a program by the CPU 10 and the data transfer by the DMA controller 20 are performed in parallel. A disk controller 50 shown in FIG. 9 executes access control to the magnetic disk 40 under the control of the DMA controller 20.
In a case where a specified file on the magnetic disk 40 is developed on the RAM 30b and record update is performed in the RAM 30b in the conventional apparatus, however, the CPU 10 cannot perform the record update in the RAM 30b until all the records of the specified file on the magnetic disk 40 are completely developed in the RAM 30b.
This is because, like in the case of a file search, all the records of the specified file are considered as subjects of the process to be performed by the CPU 10. There are however many cases where data update is performed directly on read records without requiring reading of every record into the RAM 30b. One such case may be, for example, where a predetermined value is sequentially added to the numerical data of predetermined items of every record.